I2C Triggering and Decoding |
Bus configuration |
sources for SCL and SDA |
channel 1, channel 2, channel 3,
channel 4, logic channels from D0 to D15 |
bit rate |
up to 10 Mbps |
size of address |
7 bit or 10 bit |
size of data |
8 bit |
label list |
associate frame identifier with symbolic ID |
Trigger |
trigger events |
start, stop, restart, missing acknowledge, address (7 bit or 10 bit), data, address and data |
offset for trigger on data |
0 data byte to 4095 data byte |
data pattern width |
up to 3 sequential data byte |
Decode |
displayed signals |
bus signal, logic signal or both |
color coding of bus signal |
address, data, start, stop, ACK, NACK; error and trigger event are displayed in different colors |
displayed format of address |
hex |
displayed format of data |
ASCII, binary, decimal or hex |
SPI triggering and decoding |
Bus configuration |
sources for CS, CLK, MOSI and MISO |
channel 1, channel 2, channel 3,
channel 4, logic channels from D0 to D15 |
bit rate |
up to 25 Mbps |
chip select (CS) |
active low, active high or missing (two-wire SPI) |
clock (CLK) slope |
rise or fall |
data symbol size |
1 bit to 32 bit |
idle time for two-wire SPI |
< 1 ms |
Trigger |
trigger events |
start of frame, end of frame, bit number, data pattern |
selectable bit number |
0 to 4095 |
offset for trigger on data pattern |
0 to 4095 bit |
data pattern size |
1 bit to 32 bit |
Decode |
displayed signals |
bus signal, logic signal or both |
color coding of bus signal |
data, start, stop; error and trigger event are displayed in different colors |
displayed format of data |
ASCII, binary, decimal or hex |
data decoding |
MSB or LSB first |