Pico Logic Analyzers
Logic Analyzers display multiple digital signals in a circuit and are ideally suited for complex hardware/software debugging. Data memory and advanced trigger settings give user higher accuracy and data analysis capabilities. Triggering capabilities are particularly useful when studying the timing relationship between several digital signals.
Logic Analyzers have inputs in multiples of eights (8, 16, 32, 64, etc) so you can look at timing signals on the inputs and outputs of a board full of digital circuits. A logic analyzer can help capture and evaluate many signals at once. While an oscilloscope could be used, the most signals typically seen are either two or four. This would make debugging a complex circuit very time consuming and tedious.
Many logic analyzers often include a pattern generator. A pattern generator adds the ability to simulate the high and low outputs of a system to see how a circuit will react over multiple lines of programming. This gives a POV from the hardware, which is typically helpful in design and debugging.
A logic analyzer will react as a digital circuit would. Once a signal is sensed (either high or low), one can also trigger a reaction based on a specific pattern in the signal. This is important when looking at the timing on a bus system, for instance. The logic analyzer can be used to decode the data and put it into terms that are more meaningful to the designer.
A logic analyzer is basically two different kinds of analyzers, a timing analyzer and a state analyzer. As a timing analyzer, the instrument works basically like an oscilloscope, measuring time along a horizontal axis and voltage along the vertical. The resolution is one bit, since there are only two possible conditions, low or high. This is based on the set voltage threshold. Once it reaches that threshold, the signal is a 1 or high. If it is below the threshold, it is low, or 0.
This timing analyzer is very limited, but very useful for looking at the timing relationships of dozens or even hundreds of lines of signals. Every sampled point uses one memory location. So make sure to select an analyzer with enough memory for the application(s). The higher the sample rate/resolution, the smaller the length the acquired signal will be.
A way to make sure memory is used efficiently is to specify the type of trigger, such as a transition. This way if there is nothing happening, it is not recorded. Once a transition happens (either going from a high to a low or low to a high) just the event is captured. Just the more relevant information is captured and with a lower amount of memory.
A timing glitch (defined as a transition that occurs more than one time between a sample) can be another type of problem to capture. Tracking down an elusive condition that occurs infrequently when recording signals can fill up memory very quickly. Better to have the ability to trigger on transitions between signals automatically. Even more helpful is to have both a capture of the glitch and the conditions before it occurred. This can aid in determining the cause of the error.
Pattern timing triggering gives one the ability to set high/low conditions on multiple inputs at one time. One can often set the trigger in either binary (0’s and 1’s), hex, octal, decimal or ASCII numbering systems. Hex is commonly used when looking at a bus that is a multiple of 8 bits wide.
A state analyzer determines when the data being looked at is valid. For instance, to know when a positive clock edge has occurred. This way, none of the other input information will be captured until the clock is going to 1. This is a synchronous sample, since the state analyzer is using the system clock. Unlike the timing analyzer which is asynchronous and uses the internal clock from analyzer.
Adding the power/complexity of the state analyzer is the fact that often times systems have multiple clocks. The logic analyzer then needs to be able to sense patterns on the bus. This will eliminate capturing unimportant data. Having a disassembler function is useful in that it will convert the codes (often hex, as when looking at a processor) into assembly code so that can be more easily read.
Logic Analyzer Selection Considerations
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Bench, portable, or PC Based
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Sample rate (MHz) sufficient to capture desired signals and allow for future applications
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Number of Channels (signals) to be measured
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Memory depth sufficient for data capture
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Trigger capabilities
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Decoding functions
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Pattern generation
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Mixed Signal Oscilloscopes also include built in Logic Analyzers